*The DSDAC1.0 Deluxe can now be ordered with our new digital interface card installed. This card adds the Cen.Grand proprietary digital interface called POW and is used with the NEW GLD1.0 music server. It consist of an FC optic fiber (data) and BNC coax (clock) connections. An I2S input is also included for connection to any source with an I2S output using the 'PS Audio' pin out standard.

DSDAC1.0 (deluxe model)

DSDAC 1.0 deluxe model is a new product which was developed on the basis of the standard model by optimizing the clock system and making major modifications to the circuit. It is different from the ordinary DAC. Its high-precision DSD frequency raising algorithm solves the playback problem of dsd64 perfectly. The synchronous direct clock technology enables the built-in femtosecond clock to be transmitted to the shift register directly without any process, so that the femtosecond performance can directly improve the analog signal quality. The clock blocking technology can isolates the clock of pre-device completely, so that the clock of the pre-device no longer becomes a factor affecting the sound quality.

Difference between DSDAC1.0 deluxe and standard model

1. The clock system of deluxe model has higher performance, RMS jitter is as low as 100fs
2. Digital & analog circuit is more advanced, many advance component are used
3. Fully optimized power system. Independent transformers are used for analog and digital
4. More exquisite appearance

The performance of deluxe model has been greatly improved. Many customers has confirmed.

DSDAC1.0 is an audio DAC based on DSD audio technology. It took five years to develop. It has three advanced audio technologies:

1. high-precision algorithm for DSD frequency up
2. synchronous direct clock
   
3. clock blocking technology
   

It is a perfect DSD audio DAC.

1. R & D Background

DSD audio coding mode is almost perfect although it has many technical barriers. The unique charm of DSD sound attracts many people, many music lovers have high enthusiasm for DSD in the past decade. At present more than 10000 SACD music albums have been released in the world which is a valuable music resource for mankind. In order to make it play a greater role many people are making unremitting efforts and we are one of them.

Due to the fact that disc storage space is limited, SACD adopts the dsd64 format which with lower frequency. The accuracy of dsd64 in DA conversion is low and there is out of band noise (noise above 23khz) after DA process. Therefore, most SACD players must convert dsd64 to PCM before DA conversion. This way weakens the advantages of DSD, and it was an important reason why SACD fails in the competition with CD.

With the passage of time, more in-depth research on DSD coding technology have made progress. FPGA technology has also made great progress. Therefore the technology of raise DSD frequency form 2.8224MHz to high number has been available. It can make the DA process with higher accuracy after frequency was rised. At the same time because the frequency of out of band noise is pushed up, it can be easily filtered out. Based on these conditions we decided to start the research and development the algorithm for DSD frequency increasing.

2. R & D History

DSD technology is a commercial technology, so there is little public information can be found. After several years of efforts, we studied the basic theory of DSD and created a unique algorithm to realize the high-precision frequency rising. At the same time we made a comprehensive innovation in the clock framework, created two unique technologies of "synchronous direct clock" and "clock blocking".

Analog circuit is the key part of DAC. The advantages of the digital part must rely on the analog circuit. One deviation of the analog part is enough to offset the three advantages of the digital part. The R & D team of DSDAC1.0 spent nearly a year for designing the circuit architecture of the analog part more than 20 times. After a long period of adjustment, dsdac1.0 has reached the level of reference DAC.

3. Core Technology

The high-precision frequency rise algorithm is the core of DSDAC1.0. Although there are many ways to realize frequency rising but the high-precision frequency rise algorithm is a complex mathematical problem not a digital technical problem. The technology of frequency rising not only makes DSD more widely used but also makes DSDAC1.0 become leading audio DAC.

Synchronous direct clock technology: femtosecond clock inside DSDAC1.0 will be sent to the shift register directly without any intermediate conversion, so that the performance of femtosecond clock is directly reflected in the analog output. This technology is different from the use of external femtosecond clock and built-in femtosecond crystal oscillator. The use of external clock and built-in crystal oscillator can only be a source clock, it must be divided by frequency divider. In this way, there are large additive jitter which changes the femtosecond clock from femtosecond to picosecond. The clock of DSDAC1.0 can be sent to shift register directly without frequency divider, it is advanced technology of clock application.

Clock blocking. It means that the clock from the pre-devices is abandoned and the DSDAC1.0 only uses the local clock. In this way, the clock of pre-devices such as digital turntable, CD player and digital interface will no longer affect the performance of DAC. As long as the data is correct, there is no difference in any digital source. This technology is a dream of digital audio. Clock blocking is synchronization process, not the ASRC, which has great negative impact on sound quality. It solves the clock problem that has plagued the digital audio field for a long time.

DSDAC1.0 has advanced USB interface and can receives DSD source code in native mode. As a DSD DAC, receives DSD source code is a necessary function. DSDAC1.0 has two ways to input DSD source code: one is to input dsd64 via SPDIF in DOP mode, and the other is to input dsd512 via USB in native mode. The XU208 scheme of XMOS inside DSDAC1.0 has ground isolation function, the interference of the front digital source can be almost isolate. We have customized the special driver from XMOS to enable DSDAC1.0 to receive the source code of dsd512 in native mode.

Functional Parameters

• SPDIF sampling rate: PCM 192 kHz / dop64 (AES, optical fiber, coaxial, BNC)
• USB sampling rate: pcm384 / dsd512 (native)
• Output interface: one for XLR and one for RCA
• Output level: 6.2V RMS (XLR), 3.51V RMS (RCA)
• Volume control range: - 65dB ~ 4dB
• Overall dimension: 430 * 360 * 100mm
• Net weight: 11.5kg
• Gross weight: 13.8kg